Author: Jayant Joshi

Resourceful and target oriented recruiting professional with 16+ years of experience in handling technical recruiting life cycle across the Semiconductor and Software Industry. Expertise in scaling the hiring efforts through strategy, planning, to meet the large-scale as well as niche skill hiring needs. Exhibited skills in performing data driven insights to support the recruiting analytics needs of the business, to drive more informed business decisions. Hands-on in using LinkedIn, LinkedIn Recruiter, Boolean search, reverse talent searches, Seek-Out, Return to India, and other creative sourcing strategies for talent sourcing. Effective communicator, Collaborative and strong interpersonal skills, ability to relate to people at any level of business management. Recent experience as a Senior Technical Recruiter at Salesforce, managing end-to-end recruitment for software engineering roles and driving innovative resourcing solutions to attract top talent.

Faith and Trust!

Jayant Joshi

This episode dates to October 2007. Sometimes at around 7:00 PM on one of those busy evenings, I was heading back to my room, riding as a pillion on my friend’s bike to pick up my baggage to go to Nagpur, my hometown. Although the train was scheduled to leave the central station at 10.10 PM, the city traffic was making me nervous. On the days that are important to us, when we expect things to be alright, Bangalore woes can unexpectedly disrupt your expectations. While the home-going exhilaration was seemingly turning numb, many inexplicable worries were gripping my mind, including one genuine worry of not achieving my target for the month was surfacing at the top. The interrelated anxieties, reminding me of the theory of relativity were putting me into an awkward jinx.

Suddenly the phone rang and a very familiar voice at the other end said, “lucky you…you are going home”. That was my manager, who hesitantly approved my leave. I call it as a hesitant and a conditional approval, because I was short of my target offers for October and my manager expected me to add one more offer to my kitty from any of our client list, before I head out. The call skipped my heartbeat for a while since everything was set for my travel with the festivities of Diwali around. “You know, Kiran is selected for an offer by X company and he just received the confirmation communication from the client. Enjoy your holiday” he cut the call off. I was ecstatic while I was also relieved that now nothing can stop me from boarding the train, except the Bangalore traffic.

 “You know what, it’s faith!” my friend who overheard my conversation with my manager made the statement, while we opened the door of my room. “It’s all what you do matters. From understanding the client requirements and carrying out the role mapping, from calling the candidate to selling the job description – you did all that a professional headhunter is obligated to do. You matched the candidates’ interest, you did a rigorous follow up and in the whole process you built a rapport, hinging the relation on a very strong foundation of faith. In no time, the candidate looked up to you as a trusted partner and pledged his career to you, to be taken to the next level. Also, in the whole process, you too discovered that the candidate has what it takes to crack the interview.”

My friend’s words made me connect the dots. I simply looked at him with profound glee in my eyes and faintly smiled. That night, even the city conspired to clear off the traffic and let me board the train with zero hassles. Of course, that year was one of my best Diwali vacation.

***

During January 2008, Kiran and I agreed to meet at a coffee shop, closer to his new office. During our meeting, he thanked me profusely and told me as to how much he is truly liking the work assigned to him and the overall work environment. It was one of the rare moments where I could realize as to how important it is to have a good combination of a right candidate to be intersected with client’s expectations. I increasingly realize now that recruitment is not a one-sided effort. You need a good candidate, as much as you need a good company. More than anything, one needs to establish a foundation of mutual trust. The most effective way to build trust is to be open and honest with both parties. And the best way to do this is to be and become one of them. Whatever it is you recruit for; you need to get inside their field of work. Understanding their world of work is important; their skills, their nature of work will help you not only understand the new terrain but also empowers you to make them feel that what you are sharing with them is not just the industry jibe and some keywords – but you know what you are talking about and how it eventually impacts their career.

Now I understand, the importance of trade journals that I read to keep myself abreast with the industry that I recruit people for. Keeping constantly advancing our understanding about the world of hiring- fosters strong, trustworthy communication with our candidates as well as our clients.

Now I understand, why being trusted is a greater compliment than being loved.

**********

Jayant Joshi

 

Principal RTL Design Engr (WLAN IP Design)

Jayant Joshi

RTL Design for WLAN Sub-system for IOTs.

Join Cypress Semiconductor’s IoT Team and develop WLAN sub-system/System on Chip. This team is searching for a hands-on, team-oriented design engineers with a proven track record.

In this role, the engineer will be responsible for developing WLAN Sub System. We are looking for self-motivated and experienced engineers who can work with minimal supervision in our design team and be able to work closely with our local and global design teams

We are Hiring! RTL Design Engineers for # IOT SoCs

Job description: Development of WLAN IP/Sub-system for IOT applications with following responsibilities.

  1. Contribute to the closure of design specification.
  2. Arrive architecture/micro-architecture.
  3. Optimized RTL design using VHDL/Verilog.
  4. Integration of third-party IPs with AMBA & proprietary interconnects.
  5. Involve in IP/subsystem level verification, emulation platform development and lab debugging. Participate in synthesis, static timing analysis, DFT, post-silicon validation and debug.

Requirement: ASIC/SOC RTL Design Experience with following skills.

  1. Good exposure to latest ARM CPU/processor architecture.
  2. Proficient in micro-architecture and Verilog/VHDL coding.
  3. low power design concepts.
  4. Strong skills in front-end flows like lint, CDC, and LEC
  5. Bus protocols like AMBA AXI/AHB,APB, cache protocols, coherency.
  6. Experience in C/C++ & assembly coding, CPF/UPF Flow
  7. Strong skills in scripting: TCL, Perl, Python etc.

Note

Cypress is an Equal Employment Opportunity employer and does not discriminate in recruiting, hiring, training or promoting, on the basis of race, ethnicity, color, creed, religion, sex, sexual orientation, gender, gender identity, genetic information, national origin, physical or mental disability, pregnancy, medical condition, U.S. military or protected veteran status, union membership, or political affiliation.

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

For More details, write to me Jayant.joshi@Cypress.com

Principal Systems Engineer (WLAN)

Jayant Joshi

Cypress’ advanced system-level solutions are Embedded in Tomorrow™. We target markets growing faster than the broader semiconductor industry, including automotive, industrial and consumer electronics markets. Our world-class, secure wireless technology—along with our MCUs, memories, analog ICs and USB controllers—give us an unparalleled competitive advantage in the Internet of Things, and a jump on emerging markets, including connected appliances and autonomous cars.

Job Description: The candidate will be responsible for system engineering tasks associated with next generation IoT products. The candidate will work within the systems development team to develop physical layer algorithms and practical implementation of these algorithms.

Some of the job responsibilities are: create concepts, generate system requirements, create architectures, perform simulation and analysis including the modeling of RF and analog domain non-idealities, and solve system level problems during the development and production stages of the product. Successful candidate must have the ability to communicate with engineers of varying backgrounds: software, digital hardware, RF IC design, operations, and marketing.

Job Requirements:

– Must have experience in the design of digital wireless receiver architectures. This includes both demodulator and forward error correction experience as well good understanding of the digital implementation constrains and techniques required for such wireless systems.

– Experience in WiFi/Bluetooth/BLE/Zigbee/LR transceivers is a plus.

– Must have experience in digital receiver processing, digital filter specification and design.

-Experience with C, C++, and Verilog is required.

-Matlab/Simulink experience is a plus.

-Scripting language experience such as Perl, Python is a plus.

-Candidate must have good communication skills with willingness to interact with various groups within the company.

Note

Cypress is an Equal Employment Opportunity employer and does not discriminate in recruiting, hiring, training or promoting, on the basis of race, ethnicity, color, creed, religion, sex, sexual orientation, gender, gender identity, genetic information, national origin, physical or mental disability, pregnancy, medical condition, U.S. military or protected veteran status, union membership, or political affiliation.

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

For More details, write to me Jayant.joshi@Cypress.com

 

Contact the job poster

 

 

 

RTL Design: ARM based CPU Sub-System Design

Jayant Joshi

Cypress’ advanced system-level solutions are Embedded in Tomorrow™. We target markets growing faster than the broader semiconductor industry, including automotive, industrial and consumer electronics markets. Our world-class, secure wireless technology—along with our MCUs, memories, analog ICs and USB controllers—give us an unparalleled competitive advantage in the Internet of Things, and a jump on emerging markets, including connected appliances and autonomous cars.

Principal elect design engineer responsible for the definition and design of ARM based CPU Subsystem or associated component IPs.

Responsibilities: Design of CPU Subsystem IPs including literaure search, bench marking, feature definition, micro architecture, logic design and optimization for Power, Performance and Area for Multi-core CPU Subsystems for Complex SoCs targeting Consumer/Automotive and IoT applications.

  • Micro-architecture exploration
  • Functional performance benchmarking and optimization
  • PPA (Performance/Power/Area) optimization
  • Define IP partitioning
  • Analyze 3rd party solutions (Netspeed, Arteris, ARM, etc.)
  • Integrate newer ARM cores (M33, etc.)

Skills:

  • Strong knowledge of ARM processors (Cortex-M0, M0+, M4, M7, M33, A5 etc..), micro-controller IP design using ARM processors, AHB, AXI is mandatory. Knowledge & experience of Microarchitecrure, RTL, Synthesis, STA etc..
  • Good problem solving skills.
  • For Logic design, experience with Logic Synthesis, Linting, CDC and DFT tools is preferred.

The candidate should be able to demonstrate the following behaviors:

  • Work effectively with both internal and external teams/customers is expected
  • Mentor other engineers and technically guide them
  • Experience with silicon which include ARM micro controller and custom Analog Block working together.
  • Facilitator of direct and open communication, diversity of opinion, and debate
  • In addition, be self-motivated with the initiative to seek constant improvements in the logic design methodologies.
  • The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment

Minimum Requirements: Must have the following:

BS or MS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 15+ years of relevant experience in IP/SoC design.

Must have the following:

  • Proven expertise in Silicon product development preferably in micro controller space
  • Experience with designing/dealing with various type of blocks like SRAM, SROM, embedded Flash macros etc.
  • The ability to work as an individual and as part of a team to deliver complex IPs starting from the creation of the spec, design, verification, and finally high volume productization is a strong requirement.
  • Expertise in dealing and designing with complex IP’s from different sources onto the same piece of silicon.
  • Understand system implications of the silicon design decisions

Degree & Discipline: ME, Microelectronics & Embedded Systems

Experience in Industry: 15+ years with relevant experience in IP/SoC design

For more details, Inbox me to Jayant.joshi@Cypress.com

Thanks & Regards,
Jayant

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Analog Circuit Design Engineer

Jayant Joshi

Cypress Semiconductor Corporation, Bangalore is hiring! Analog Circuit Design Engineers with 2 to 8 years of experience in Analog/Mixed signal based Circuit Design of ADCs/DACs, PLLs, Oscillators, Bandgap, Comparator, Buck/Boost, LDO, USB, Type-C, USB3.0, USB3.1

Analog-Design_External_V2.jpg

Kindly go through the job description for the Analog Circuit design engineer

Job Description

  • Must have successfully developed multiple Si Proven IP from spec to production
  • Must have deep understanding with IP development methodology and Chip level analog macro integration
  • Experience with Cadence, Eldo, Finesim, Questa ADMS, HSPICE or equivalent tools required
  • Good understanding of analog macros such as ADC/DAC, PLL, Oscillator, Bandgap, Comparator, Buck/Boost, LDO, Type-C  and Process monitors etc.
  • Should be able to take ownership of chip level electrical specifications and requirements for analog macros
  • Expert with analog/ mixed signal design flows and simulation tools and ideas for continuous improvement
  • Design from spec to silicon and product development flow exposure is a plus
  • Additional experience in circuit level debug/ characterization is highly desirable
  • Experience with scripting languages like perl, skill, tcl or equivalent to automate flows is a plus
  • Exposure to Type-C, USB2.0/3.0/3.1 is a plus
  • Experience Required : 2 to 8 years of Suitable design experience

If you think this is exciting and you are interested to explore.                                                   Please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Design Verification Engineers (USB/PCIe /AXI)

Jayant Joshi

Cypress Semiconductor Corporation, Bangalore is hiring: Design Verification Engineers with 5+ Years of experience range and I have multiple positions. 

This is for the IP/SOC DV for USB 3.0/3.1/ USB Power Delivery/ PCI-express/AXI combo product development. these are strategic roles where the team size is expected to grow.

We are looking for engineers with Excellent knowledge of verification methodologies for IP, sub-system and full chip verification. Capable of analyzing verification techniques with a view towards finding functional failures or bugs at the block, subsystem and chip levels. Aware of system level functions, applications and architectures.

Receives no direction on routine assignments and general instructions on new assignments. Decisions, recommendations, and the ability to obtain results impact programs to meet schedules.

Aids designers on specific functional debug. Provides guidance to the work of a verification engineer. Works with Test and Product engineers to develop and validate test vectors. Acts as a leader of small verification projects such as subsystem verification. Interacts with architects and designers of IP blocks or subsystems to ensure development and attainment of coverage goals and metrics.

Adapts to new technologies, product and logic functionality with ease. Verifies moderately complex logic. Schedules short term goals with demonstrated accuracy. Assists with definition of long-term project goals.

Design-Verification_External

Job Description: 

Experience in ASIC Verification Methodology – SystemVerilog, SVA, UVM/OVM
Experience in developing IP/SOC level Testbench, Test Plan, BFM, Checkers, Assertions, Scoreboards, Coverage models
Experience in functional, Low-Power, gate-level, SDF simulations
Experience with PCIE /USB/USB-PD/Type-C/ARM
Experience in Perl, Python, Shell scripting
Strong Debug and Analytical skills

Skills: SV, UVM, PCIE Gen1/2/3/4, USB3.0/3.1, USB Type-C, AXI, ARM

If you think this is exciting and you are interested to explore. Write to me at                    Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Hiring RTL Design Engineers for nextGen USB IP Development!

Jayant Joshi

Cypress Semiconductor Corporation, Bangalore is hiring! Principal /Sr Principal Elect Design Engr for RTL Design for USB 3.0/3.1/ USB Power Delivery product development. this is a strategic role where the team size is expected to grow.

Experience: 12 to 18 years of experience.

Hiring RTL Design Engineer responsible for the design and development of USB-PD controller SoC with 12 to 18 years of Experience

Responsibilities: Design of USB-3.0/3.1/ Power Delivery controller IP and full chip integration including micro architecture, logic design, LINT, Clock Domain Crossing Analysis, UPF, LEC, Synthesis, ATPG, overseeing all verification, backend implementation and validation aspects of the IP/Full chip etc.

Skills

  • Knowledge & experience of Microarchitecture,  RTL, Synthesis, STA etc.
  • Logic design, experience with Logic Synthesis, Linting, CDC and DFT tools is preferred.
  • The candidate should be able to demonstrate the following behaviors: – Work effectively with both internal and external teams/customers is expected. – Mentor other engineers and technically guide them. – Strong written and verbal communication skills – Facilitator of direct and open communication, diversity of opinion, and debate

Minimum Requirements: BS or MS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 12 to 18 years of relevant experience in IP/SoC design. Must have the following: – Proven expertise in Silicon product development preferably in micro controller space – The ability to work as an individual and as part of a team to deliver complex IPs starting from the creation of the spec, design, verification, and finally high volume productization is a strong requirement. – Expertise in dealing and designing with complex IP’s from different sources onto the same piece of silicon. – Understand system implications of the silicon design decisions.

If you think this is exciting and you are interested to explore.                                                   Please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Design Automation Engr : Tools, flow, Methodology

Jayant Joshi

Looking for a problem solver with a keen eye to detect and solve flow effectiveness and efficiency challenges in RTL2GDS flow. Your work will impact all design platforms used in Cypress worldwide.

Its an opportunity to grow as the methodology owner of multiple areas of design flow and provide complete CAD solution to design teams – including anticipating/understanding future needs, enabling them to create “World’s best Semiconductor – on-time, every time”.

Own RTL2GDS flow used in Cypress – evaluate and deploy required tools & flow and close methodology gaps using automation and tool development.

CAD.png

Required Skills:

  • Need to understand basic devices and RTL coding, understand overall RTL2GDS flow, with expertise in one of DFT, PnR or STA.
  • Person must be good in aptitude, debugging and automation, SW Development
  • Experience: 4 to 10 Years of Industry experience

Immediate responsibility:

  • Run CAD projects – plan and drive ongoing projects to meet existing design requirements.
  • Work involves the evaluation, integration, and training required for new and improved tools and changes to the design methodology. This includes interaction with design and the associated time to market/speed/area trade-offs.
  • Will be responsible for understanding design methods and current gaps, tool/methodology evaluation/deployment, support deployed tools and driving methodology for productive design environment.
  • Understand and define design methodologies across semicustom design flow  (RTL analysis, Synthesis, Place and route, STA, extraction, dynamic IR, physical verification).
  • Must be able to identify methodology gaps and improvements and provide automation to perform all design activities in the most efficient and correct by construction way.

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

Cypress Semiconductor

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Ireland: Analog Design Engineer

Jayant Joshi

Cypress Semiconductor Ireland is the Centre of Excellence for Capacitive Sensing IP development within Cypress Semiconductor.

The team is developing product differentiating Human-Machine-Interface IP for several markets including Automotive, Home Appliance and Internet of Things/Wearables. The team is responsible for the design and development of capacitive sensing IP such as Touch Screen Controllers, Fingerprint Controllers and Capacitive Sensing Controllers.

We are actively seeking talented IC engineers who want to join a dynamic and experienced team and take their technical knowledge to the next level in our mission of excellence.

Slide2

Please go through the job description:

Cypress Semiconductor Ireland is recruiting an analog circuit designer to join its team in Cork, Ireland. 

We seek Analog & Mixed signal designers with good knowledge of analog circuits achieving high performance, low power, and efficient implementation

Desired skills 

Strong knowledge of analog design fundamentals, experience with OPUS design entry, HDL design entry, circuit simulation, mixed signal simulation and modeling.

Minimum Education & Work Experience: BSEE required, MSEE preferred; relevant project experience.

Good problem solving and communication skills. Team player.

Degree & Discipline: ME, MICROELECTRONICS & EMBEDDED SYSTEMS
Experience in Industry: 2-5 years.

PS: If you are not an Ireland Citizen, Request you to share your valid work permit details to work in which will help me process your resume/application forward.

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

Cypress Semiconductor

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

 

Germany: Digital Design Engineer

Jayant Joshi

Join our design team for digital video and graphics IP in Munich, Germany and contribute to the development of mission critical components for our Automotive and Industrial MCU products. We are looking for a digital design expert with focus on architecture definition and conceptual pre-development topics.

Skills Required: 

Deep knowledge in digital hardware design, MCU architectures and video processing techniques. Strong professional background in logic IP development on module and subsystem level. Preferable with experience in verification (UVM) and virtual prototyping (TLM)

Key Words: digital design, verification, architecture, concept, system, video, graphics, prototyping

Slide3

 

We are looking for an experienced candidate with focus on architecture work: interfacing between system architects / marketing and the design team, owning the architecture specification for subsystem level components.

Beside that focus, the candidate should have solid background in digital hardware design and all related development steps (verification, modelling, prototyping).

German language skills would be a big plus

Good problem solving and communication skills. Team player.

Degree & Discipline: ME, MICROELECTRONICS & EMBEDDED SYSTEMS
Experience in Industry: 4-8 years.

PS: If you are not an German citizen, request you to share your valid work permit details to work in which will help me process your resume/application forward.

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.